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| (R) EMIF02-MIC03F1 IPADTM 2 LINES EMI FILTER AND ESD PROTECTION MAIN PRODUCT CHARACTERISTICS: Where EMI filtering in ESD sensitive equipment is required : Mobile phones and communication systems Computers, printers and MCU Boards DESCRIPTION The EMIF02-MIC03 is a highly integrated device designed to suppress EMI/RFI noise in all systems subjected to electromagnetic interferences. The EMIF02 flip chip packaging means the package size is equal to the die size. This filter includes an ESD protection circuitry which prevents the device from destruction when subjected to ESD surges up 15kV. Flip Chip package BENEFITS EMI symmetrical (I/O) low-pass filter High efficiency in EMI filtering Very low PCB space consuming: 1.07mm x 1.47mm Very thin package: 0.65 mm High efficiency in ESD suppression High reliability offered by monolithic integration High reducing of parasitic elements through integration & wafer level packaging. PIN CONFIGURATION (ball side) 321 I2 GND I1 A B COMPLIES WITH THE FOLLOWING STANDARDS: IEC61000-4-2 Level 4 Level 1 on input pins on output pins 15kV 8 kV 2kV 2kV (air discharge) (contact discharge) (air discharge) (contact discharge) O2 O1 C MIL STD 883E - Method 3015-6 Class 3 BASIC CELL CONFIGURATION Low-pass Filter Input Output Ri/o = 68 Cline = 100pF GND TM : IPAD is a trademark of STMicroelectronics. GND GND January 2004 - Ed: 3A 1/6 EMIF02-MIC03F1 ABSOLUTE RATINGS (limiting values) Symbol Tj Top Tstg Parameter and test conditions Maximum junction temperature Operating temperature range Storage temperature range Value 125 -40 to + 85 -55 to 150 Unit C C C ELECTRICAL CHARACTERISTICS (Tamb = 25 C) Symbol VBR IRM VRM VCL Rd IPP RI/O Cline Parameter Breakdown voltage Leakage current @ VRM Stand-off voltage Clamping voltage Dynamic impedance Peak pulse current Series resistance between Input & Output Input capacitance per line IPP VCL VBR VRM IR IRM IRM IR VRM VBR VCL I IPP V Symbol VBR IRM RI/O Cline IR = 1 mA VRM = 3V per line Tolerance 20% VR = 0V Test conditions Min. 6 Typ. 8 Max. Unit V 500 68 100 nA pF Fig. 1: S21(dB) attenuation measurement and Aplac simulation. 0.00 dB -5.00 -10.00 -15.00 -20.00 -25.00 -30.00 -35.00 -40.00 -45.00 -50.00 100.0k Fig. 2: Analog crosstalk measurements. 0.00 dB -10.00 -20.00 -30.00 -40.00 -50.00 -60.00 -70.00 1.0M 10.0M f/Hz 100.0M 1.0G -80.00 100.0k 1.0M 10.0M f/Hz 100.0M 1.0G 2/6 EMIF02-MIC03F1 Fig. 3: ESD response to IEC61000-4-2 (+15kV air discharge) on one input V(in) and on one output (Vout). Fig. 4: ESD response to IEC61000-4-2 (-15kV air discharge) on one input V(in) and on one output (Vout). Fig. 5: Line capacitance versus applied voltage. C(pF) 140 120 100 80 60 40 20 VR(V) F=1MHz Vosc=30mVRMS Tj=25C 0 0 1 2 3 4 5 3/6 EMIF02-MIC03F1 Aplac model. IN1 Rbump Lbump Rmic Lmic Lbump Rbump OUT1 model = D1 model = D2 Rsub GND Lsub GND model = D3 Rbump Lbump model = D1 model = D2 Cgnd Lgnd Rgnd IN2 Rbump Lbump Rmic Lmic Lbump Rbump OUT2 EMIF02-MIC03F1 model Ground return Aplac parameters. Model D1 CJO=Cdiode1 BV=7 IBV=1u IKF=1000 IS=10f ISR=100p N=1 M=0.3333 RS=0.7 VJ=0.6 TT=50n Model D3 CJO=Cdiode3 BV=7 IBV=1u IKF=1000 IS=10f ISR=100p N=1 M=0.3333 RS=0.12 VJ=0.6 TT=50n Model D2 CJO=Cdiode2 BV=7 IBV=1u IKF=1000 IS=10f ISR=100p N=1 M=0.3333 RS=0.3 VJ=0.6 TT=50n aplacvar Rmic 68 aplacvar Lmic 10p aplacvar Cdiode1 100pF aplacvar Cdiode2 3.6pF aplacvar Cdiode3 1.17nF aplacvar Lbump 50pH aplacvar Rbump 20m aplacvar Rsub 0.5m aplacvar Rgnd 10m aplacvar Lgnd 50pH aplacvar Cgnd 0.15pF aplacvar Lsub 10pH ORDER CODE EMIF EMI Filter Number of lines yy - xxx zz F x 1: Pitch = 500m Bump = 315m 2: Leadfree Pitch = 500m Bump = 315m Flip Chip x: resistance value (Ohms) z: capacitance value / 10(pF) or Application (3 letters) and Version (2 digits) 4/6 EMIF02-MIC03F1 PACKAGE MECHANICAL DATA FLIP CHIP 500m 10 250m 10 315m 50 650m 50 50 0 m 1.07mm 50m FOOT PRINT RECOMMENDATIONS Copper pad Diameter : 250m recommended , 300m max Solder stencil opening : 330m Solder mask opening recommendation : 340m min for 300m copper pad diameter MARKING Dot, ST logo xxx = marking yww = datecode (y = year ww = week) 1.47mm 50m 15 365 240 365 xxx y ww 40 220 All dimensions in m 5/6 EMIF02-MIC03F1 PACKING Dot identifying Pin A1 location 4 +/- 0.1 O 1.5 +/- 0.1 1.75 +/- 0.1 3.5 +/- 0.1 0.73 +/- 0.05 All dimensions in mm 8 +/- 0.3 ST xxx yww ST xxx yww ST xxx yww 4 +/- 0.1 User direction of unreeling OTHER INFORMATION Ordering code EMIF02-MIC03F1 Marking FWT Package Flip Chip Weight 2.1 mg Base qty 5000 Delivery mode Tape & reel (7") Note: More packing informations are available in the application notes AN1235: ''Flip-Chip: Package description and recommandations for use'' AN1751: "EMI Filters: Recommendations and measurements" Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. (c) 2004 STMicroelectronics - All rights reserved. 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